MIPSfpga: Using an Industrial Non-Obfuscated MIPS Soft-Core on an FPGA for Education
The MIPSfpga project, developed by Imagination Technologies, constitutes a comprehensive resource for education on computer architecture, SoC design and hardware-software co-design. It not only provides open access to the MIPS microAptiv UP soft-core processor, a member of the same family found in many embedded devices such as the PIC32MZ microcontroller from Microchip, but also includes a large set of teaching materials and software tools.
The MIPSfpga v2.0 package was released in June 2017. Among other things, students learn to set up the MIPS soft-core processor on an FPGA; run and debug programs on the core in simulation and in hardware; add new peripherals to the system by designing and implementing the hardware controller in Verilog or VHDL and the software controller in C or Assembly languages; understand the use of interrupts and a DMA; understand the microarchitecture and extend it to support new features, such as new instructions; use the performance counters; analyze the cache controller and experiment with different cache configurations, optimization techniques and content management policies; use the CorExtend interface available in MIPS processors for adding new instructions, an FPU or a DSP; and understand SoCs in embedded systems and how they are designed and built up in layers to run complex software such as Linux.
The tutorial is open to academic faculty members. It includes short talks, demos and hands-on activities. Basic knowledge of digital design, computer architecture and HDL design is required. After this training, attendees will be proficient in using MIPSfpga and be aware of its potential to revolutionize their teaching.
- Thu, Sept. 7
- 9:00 - 17:30
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