Session 5a: FPGA architectures for Neural Networks

Full Papers

• 10:45: Scalable High-Performance Architecture for Convolutional Ternary Neural Networks on FPGA // Adrien Prost-Boucle, Alban Bourge, Frédéric Pétrot, Hande Alemdar, Nicholas Caldwell and Vincent Leroy; TIMA, Grenoble Institute of Technology, LIG
• 11:10: An Automatic RTL Compiler for High-Throughput FPGA Implementation of Diverse Deep Convolutional Neural Networks // Yufei Ma, Yu Cao, Sarma Vrudhula and Jae-sun Seo; Arizona State University
• 11:35: Latency-Driven Design for FPGA-based Convolutional Neural Networks // Stylianos Venieris and Christos Bouganis; Imperial College London

Poster Papers

• 12:00: A High-Throughput Reconfigurable Processing Array for Neural Networks // Ephrem Wu, Xiaoqian Zhang, David Berman and Inkeun Cho; Xilinx, Inc.
• 12:05: Accelerating Low Bit-Width Convolutional Neural Networks With Embedded FPGA // Li Jiao, Cheng Luo, Wei Cao, Xuegong Zhou and Lingli Wang; State Key Laboratory of ASIC and System, Fudan University
• 12:10: A Fully Connected Layer Elimination for a Binarized Convolutional Network on an FPGA // Hiroki Nakahara, Tomoya Fujii and Shimpei Sato; Tokyo Institute of Technology
• 12:15: F-C3D: FPGA-based 3-Dimensional Convolutional Neural Network // Hongxiang Fan, Xinyu Niu, Ruizhe Zhao, Mengqiu Xiao, Qiang Liu and Wayne Luk; Tianjin University, Imperial College, Corerain Technologies Ltd.
• 12:20: High-Performance Video Content Recognition with Long-term Recurrent Convolutional Network for FPGA // Xiaofan Zhang, Xinheng Liu, Anand Ramachandran, Chuanhao Zhuge, Shibin Tang, Peng ouyang, Zuofu Cheng, Kyle Rupnow and Deming Chen; University of Illinois at Urbana-Champaign, Tsinghua University, Inspirit IoT
• 12:25: High Performance Binary Neural Networks on the Xeon+FPGA Platform // Duncan Moss, Eriko Nurvitadhi, Jaewoong Sim, Asit Mishra, Suchit Subhaschandra, Debbie Marr and Philip Leong; Intel Corporation, University of Sydney