Session 4b: FPGA case studies
Track: Paper track
Session chair: Miriam Leeser
Full Papers
- 13:30: Generic and Universal Parallel Matrix Summation with a Flexible Compression Goal for Xilinx FPGAs // Thomas Preußer; TU Dresden
- 13:55: An FPGA Hardware Implementation Approach for a Phylogenetic Tree Reconstruction Algorithm with Incremental Tree Optimization // Henry Block and Tsutomu Maruyama; University of Tsukuba
Poster Papers
- 14:20: Area-optimized Montgomery multiplication on IGLOO 2 FPGAs // Pedro Maat Massolino, Lejla Batina, Ricardo Chaves and Nele Mentens; Radboud University Nijmegen, INESC-ID, IST, Universidade de Lisboa, KU Leuven
- 14:25: Validating Optimisations for Chaotic Stencil Computations // James Targett, Wayne Luk and Peter Dueben; Imperial College London, ECMWF
- Tue, Sept. 5
- 13:30 - 14:30