Session 3c: Memory design and management
Track: Paper track
Session chair: Vianney Lapotre
Full Papers
- 11:30: Tile Size Selection for Optimized Memory Reuse in High-Level Synthesis // Junyi Liu, John Wickerson and George Constantinides; Imperial College London
- 11:55: Automated Generation of Banked Memory Architectures in the High-Level Synthesis of Multi-Threaded Software // Yu Ting Chen and Jason H. Anderson; University of Toronto
- Tue, Sept. 5
- 11:30 - 12:30