Session 5b: Efficient FPGA architectures
Track: Paper track
Session chair: Smail Niar
Full Papers
- 10:45: High-Quality View Interpolation Based on Depth Maps and Its Hardware Implementation // Yanzhe Li, Luc Claesen and Kai Huang; Zhejiang University, Hasselt University
- 11:10: FPGA Acceleration of Multilevel ORB Feature Extraction for Computer Vision // Joshua Weberruss, Lindsay Kleeman, David Boland and Tom Drummond; Monash University, University of Sydney, Australian Centre of Excellence for Robotic Vision
Poster Papers
- 11:35: Toward A Pixel-Parallel Architecture for Graph Cuts Inference on FPGA // Tianqi Gao, Jungwook Choi, Shang-nien Tsai and Rob A. Rutenbar; University of Illinois at Urbana-Champaign, IBM T. J. Watson Research Center, WorldQuant LLC, University of Pittsburgh
- 11:45: Parallel RRT* Architecture Design for Motion Planning // Size Xiao, Neil Bergmann and Adam Postula; The University of Queensland
- 11:50: K-means clustering on CGRA // Joao Lopes, Jose Sousa, Mario Vestias and Horácio Neto; INESC-ID / ISEL, University of Lisboa
- 11:55: FPGA Modeling Techniques for Detecting and Demodulating Multiple Wireless Protocols // Benjamin Drozdenko, Suranga Handagala, Kaushik Chowdhury and Miriam Leeser; Louisiana Tech University, Northeastern University
- 12:00: An Implementation of List Successive Cancellation Decoder with Large List Size for Polar Codes // ChenYang Xia, YouZhe Fan, Ji Chen, Chi-Ying Tsui, ChongYang Zeng, Jie Jin and Bin Li; Hong Kong University of Science and Technology, Huawei Technologies
- Wed, Sept. 6
- 10:45 - 12:30