RC4DL: Reconfigurable Computing for Deep Learning
Deep Learning (DL) has gathered significant visibility recently as an Artificial Intelligence (AI) paradigm, with success in a wide range of applications such as image and speech recognition, autonomous systems, self-driving cars, cyber-physical systems, and many more. The objective therefore of RCDL is to promote discussion and stimulate research and ideas towards the potential role of reconfigurable hardware in this important and fast-evolving domain.
The spirit of the workshop is to complement FPL and provide a forum for interesting discussions on a specific topic rather running another specific tailored conference at the same time with FPL. The Organizing Committee will therefore invite speakers on topic areas such as (but not limited to):
- Tutorials on emerging issues on deep learning highlighting future challenges and the potential role of programmable hardware in addressing them,
- Research/design papers detailing FPGA implementations of deep learning training/inference accelerators,
- Unique applications of reconfigurability in deep learning context, domain-specific programmable hardware architectures for deep learning,
- The potential uses for deep learning techniques within FPGA,
- Design-flow tools and software.
RC4DL intends to provide a substantially different event from the well-known conferences and workshops related to reconfigurable computing, by focusing on an informal way to discuss challenges, new fresh ideas, new and future trends, work in progress, etc. and by bringing together leaders in the field to present their views and work from industry and academia, while presenting both an educational and research-stimulating forum.
Along with the main workshop, a poster/demo session will take place so that authors can present their work and stimulate discussions.
RC4DL Major Topics of Interest but not limited to:
- Compilation, Programming Languages, and Domain-Specific Languages supporting deep-learning on reconfigurable Systems
- Tools, Frameworks, Design-flows for Developing DL engines and classification systems
- Reconfigurable Architectures for DL
- Communication Infrastructures for DL
- DL Applications, including Big Data Applications geared for reconfigurable hardware
- Runtime Adaptability and Potential for On-Line DL
- Resilience and Reliability Protocols and Architectures
- Performance Comparisons with other DL Systems (GPUs, CPUs, etc.)
- Hybrid and Heterogeneous DL Systems
- DL in education of reconfigurable computing
- Fri, Sept. 8
- 14:00 - 17:30
- More information